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Toshiba Electronic Devices & Storage Corporation has developed a new silicon carbide (SiC) power module technology for high-frequency inverter applications that delivers lower power losses and enhanced reliability. The technology combines Toshiba’s proprietary Schottky barrier diode (SBD)-embedded SiC MOSFET with an optimized module design to achieve highly reliable and low-loss operation during high-speed switching.
According to simulation results, the new technology can reduce total inverter power losses by approximately 30% during 60 kHz high-frequency operation compared with power modules utilizing conventional SBD-embedded SiC MOSFET structures.
The rapid adoption of artificial intelligence and the continued expansion of data center infrastructure are driving significant increases in electricity consumption. As a result, power systems are under growing pressure to deliver higher efficiency and greater power density. This trend is increasing the importance of power semiconductors capable of operating at higher switching frequencies, particularly in critical applications such as inverters and uninterruptible power supplies (UPS), where both efficiency and compactness are key requirements.
Within this environment, 1200 V-class SiC power modules are expected to play a central role in next-generation power systems. However, further advances in both semiconductor devices and module design are required to fully realize their potential.
Toshiba has previously addressed reliability challenges associated with diode conduction in SiC devices through the development of SBD-embedded SiC MOSFET technology. Conventional structures, however, impose limitations on the layout of channel and SBD regions, making it difficult to simultaneously achieve low on-resistance and high diode reliability. In addition, efforts to reduce total chip area within a power module can improve switching speed but often introduce trade-offs, including higher on-resistance, reduced diode reliability, and compromised thermal performance.
To overcome these challenges, Toshiba developed a new SBD-embedded SiC MOSFET structure that combines a checkerboard-pattern SBD layout with a deep p-type barrier region. By utilizing the electric-field suppression effect of the deep p-type barrier region, the company achieved greater design flexibility and enabled the integrated optimization of multiple device parameters, including the channel, drift layer, JFET region, and gate-drive conditions.
This architecture suppresses localized current concentration, improves current flow through both the channel and drift layer, and enables stable current operation during both on-state and diode conduction modes. As a result, the trade-off between on-resistance and diode reliability is significantly improved.
The new device achieves a specific on-resistance of 1.8 mΩ·cm² at 25°C and 2.7 mΩ·cm² at 150°C, representing approximately a 50% reduction compared with conventional device structures. In addition, SBD current conduction capability per unit area has been increased by approximately 40%.
The newly developed device has been incorporated into a 1200 V-class SiC power module. Through this implementation, Toshiba reduced the total chip area within the module by approximately 36% compared with conventional designs. Despite the reduction in chip area, improvements in device performance, including lower on-resistance and enhanced reliability, enabled lower conduction losses at the module level while maintaining diode reliability.
Toshiba also enhanced the packaging structure and module design through the adoption of a resin-insulated substrate. These improvements reduced thermal resistance per unit area by approximately 25%, improving heat spreading performance and maintaining effective heat dissipation despite the higher thermal density associated with smaller chip dimensions.
The combined device and packaging innovations also contributed to further reductions in switching losses. Simulation results demonstrated that total inverter power losses can be reduced by approximately 30% during 60 kHz high-frequency operation. Additional reductions in switching losses are expected through further optimization of operating conditions, including gate-drive speed.
The company believes the technology will serve as an important platform for achieving higher efficiency and greater miniaturization in power conversion systems, including data center UPS systems, industrial equipment, and renewable energy applications.
Toshiba plans to continue advancing the technology toward practical deployment and mass production while pursuing further improvements in high-frequency operation and overall system performance. The company aims to contribute to higher energy efficiency across power systems and support the development of a more sustainable society.
Original – Toshiba
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Semikron Danfoss has announced the initiation of patent enforcement proceedings in Germany concerning its patent DE 10 2017 218 875 C5, which covers key aspects of the company’s DCM power module technology.
The DCM platform represents a core element of Semikron Danfoss’ power semiconductor portfolio and is widely deployed across a broad range of power electronics applications.
According to the company, ongoing market monitoring activities have identified products that it believes utilize technology protected under the patent. As a result, Semikron Danfoss is pursuing these matters through the appropriate legal channels.
As part of the Danfoss Group, the company continues to invest significantly in the development of advanced technologies and regards the protection of intellectual property as a fundamental component of innovation, fair competition, and the delivery of high-quality solutions to customers.
Semikron Danfoss stated that it will continue to enforce its intellectual property rights in a consistent and proportionate manner, in accordance with the policies and principles of the Danfoss Group.
The company added that it will not provide further comment regarding the details of the ongoing legal proceedings at this stage.
Original – Semikron Danfoss
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IAV and Nexperia have unveiled the ONE Inverter concept, a joint initiative that combines advanced wide-bandgap semiconductor technology with software-defined battery and system architectures to explore a new generation of high-voltage electric vehicle platforms.
The concept is designed to improve the utilization of battery capacity by enabling more intelligent management of battery cells and power distribution. Rather than relying solely on increasing battery size, the ONE Inverter approach focuses on extracting greater value from existing battery resources through dynamic control and allocation of battery sections within a software-defined architecture.
Under the collaboration, IAV contributed its expertise in software-defined systems, battery engineering, and vehicle architectures, while Nexperia provided the enabling semiconductor technologies, including its silicon carbide (SiC) and gallium nitride (GaN) solutions.
A central feature of the ONE Inverter concept is the ability to manage battery cells based on their individual condition and performance. Instead of the overall battery pack being constrained by its weakest cell, each cell can contribute according to its actual capability. This approach is intended to improve battery utilization while enhancing overall system robustness.
The concept is enabled by Nexperia’s advanced wide-bandgap semiconductor technologies, particularly a bidirectional GaN device that supports efficient and fast switching at the battery cell level. According to the companies, this capability makes the architecture both technically and economically viable. Alternative semiconductor approaches would require significantly greater system complexity and cost. Additional components from Nexperia’s semiconductor portfolio, including bipolar devices, also contribute to the overall system design.
The collaboration demonstrates how semiconductor innovation can be integrated into software-defined vehicle architectures. By combining IAV’s capabilities in battery systems, software development, and vehicle engineering with Nexperia’s expertise in semiconductors and packaging technologies, the companies are exploring new pathways to develop more efficient, resilient, and future-ready electric mobility solutions.
Jörg Astalosch, Chief Executive Officer of IAV, said the company’s strength lies in translating technological innovation into system-level solutions. He noted that the collaboration with Nexperia explores how software-defined battery architectures can unlock new levels of efficiency, flexibility, and resilience for future software-defined vehicles.
Edoardo Merli, Senior Vice President and Head of Business Group Wide Bandgap, IGBT & Modules at Nexperia, highlighted the importance of close collaboration in developing next-generation vehicle architectures. He stated that combining Nexperia’s SiC and GaN expertise with IAV’s advanced system concepts enables new approaches to electric mobility design, while early-stage cooperation helps align semiconductor and system requirements to create scalable, high-performance solutions.
The ONE Inverter concept has already been validated through a laboratory demonstrator. The technology was jointly presented by IAV and Nexperia at the Advanced Automotive Battery Conference (AABC) Europe 2026 and PCIM Europe 2026, where it attracted significant interest from industry participants.
Original – Nexperia
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Nexperia has expanded its portfolio of 650 V industrial-grade high-power gallium nitride (GaN) FETs, introducing new devices designed to address the growing demands of high-performance power conversion applications. The expanded portfolio includes 35 mΩ, 50 mΩ, and 70 mΩ variants available in industry-standard TO-247-3, TO-247-4, TOLL, and TOLT package options.
The extended product range is intended to provide power engineers with greater flexibility in optimizing efficiency, thermal performance, and power density across a variety of applications, including data center and telecommunications power supplies, renewable energy systems, battery energy storage systems (BESS), industrial drives, and factory automation equipment.
The increasing adoption of artificial intelligence is driving a significant rise in power requirements for server racks, with power supply capacities growing from below 3 kW toward the 5 kW to 12 kW range. At the same time, renewable energy deployment and industrial electrification continue to increase demand for higher switching frequencies and improved power conversion efficiency. As a result, wide-bandgap semiconductor technologies such as GaN are playing an increasingly important role in enabling higher efficiency, reduced system size, and enhanced thermal management in next-generation power architectures.
Andrea Bricconi, Vice President and Head of the GaN Product Group at Nexperia, said the transition toward wide-bandgap power semiconductors is accelerating across industrial, energy, and AI infrastructure applications. He noted that as efficiency, power density, and thermal performance requirements continue to rise, the company remains focused on making GaN technology more accessible and scalable for engineers developing high-power systems. He added that the expansion of the company’s 650 V GaN portfolio represents an important step in that strategy and forms part of its broader roadmap in wide-bandgap technologies.
At the system level, the new GaN devices enable designers to exceed the performance limitations of conventional silicon-based solutions by supporting higher switching frequencies while reducing both switching and conduction losses. Depending on system topology and operating conditions, engineers can achieve higher power density, improved energy efficiency, reduced cooling requirements, and lower overall system costs. The higher switching frequencies also allow for smaller passive components and reduced magnetic component size, supporting more compact and scalable power conversion architectures.
According to Nexperia, in high-power LLC converter stages commonly used in 10 kW to 12 kW AI server power supplies, GaN devices can deliver approximately 0.8% to 1.2% higher efficiency at full load compared with silicon-based alternatives. In addition, power density at the converter stage level can increase by approximately 40% to 70%, enabled by higher switching frequencies and smaller passive components.
For a typical 1 kW high-voltage motor drive, the company states that GaN technology can reduce inverter power losses by approximately 20% to 25%, resulting in efficiency improvements of around 1% to 1.5%. These benefits can also support smaller thermal management systems and higher overall power density.
The devices are built on Nexperia’s proprietary GaN technology platform and combine fast switching performance, low switching losses, controlled dynamic behavior, and robust thermal characteristics. The availability of multiple industry-standard package options allows engineers to optimize both electrical and mechanical design parameters while facilitating integration into existing power conversion systems.
The 35 mΩ and 70 mΩ devices are available immediately in TOLL, TOLT, TO-247-3, and TO-247-4 packages. Additional 50 mΩ variants are scheduled for release during the third quarter of 2026.
Original – Nexperia
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Applied Materials has expanded its manufacturing and research and development operations in Singapore with the opening of a new US$500 million (S$600 million) facility at its Tampines Campus. The expansion is designed to support the global build-out of artificial intelligence infrastructure and strengthen the company’s ability to serve semiconductor manufacturers increasing capacity to meet AI-driven demand.
The new Tampines Campus more than doubles Applied Materials’ advanced cleanroom capacity in Singapore and further strengthens the company’s global manufacturing network, which includes facilities in the United States, Europe, Israel, and Taiwan. The facility is already operating at volume production and is focused on supporting semiconductor customers expanding manufacturing capacity for next-generation chips.
Gary Dickerson, President and Chief Executive Officer of Applied Materials, stated that the rapid adoption of AI technologies across industries is driving unprecedented demand for advanced semiconductors. He noted that the company’s expanded operations in Singapore enhance its ability to deliver the semiconductor manufacturing equipment required by chipmakers to accelerate the commercialization of future-generation devices.
The Tampines Campus represents a significant milestone in Applied Materials’ Singapore 2030 strategy, which focuses on strengthening global manufacturing and R&D capabilities, expanding technology ecosystem partnerships, and supporting local workforce development. The facility includes expanded manufacturing cleanrooms, increased production capacity, and dedicated R&D resources to support both regional and global customers. Applied Materials expects the expansion to create approximately 1,000 new local jobs over the coming years to support industry growth and technology commercialization efforts.
KC Ong, Group Vice President of Worldwide Manufacturing at Applied Materials, highlighted Singapore’s strategic importance within the company’s global operations over the past 35 years. He noted that the new facility has been designed to support the next generation of advanced manufacturing through automation and AI-enabled production technologies focused on speed, precision, and quality.
The Tampines Campus incorporates a range of intelligent manufacturing technologies, including autonomous mobile robots, automated assembly and testing systems, and AI-assisted quality inspection. The facility also integrates manufacturing, research, and ecosystem partnerships to accelerate technology development and commercialization. Augmented reality (AR) and virtual reality (VR) technologies are additionally used to support technician training and maintenance operations.
Sustainability was also a key consideration in the campus design. The facility has been developed to achieve Singapore’s Building and Construction Authority Green Mark Platinum certification and incorporates solar power generation, LED lighting systems, low-carbon concrete construction, a closed-loop water reclamation system designed to eliminate water waste, and a smart building management platform that monitors energy and water consumption in real time.
Png Cheong Boon, Chairman of Singapore’s Economic Development Board, stated that the use of advanced automation and AI technologies at the facility will help advance manufacturing capabilities in Singapore while strengthening the country’s semiconductor ecosystem and creating new employment opportunities.
The Singapore expansion forms part of Applied Materials’ broader global investment strategy. The company noted that it has nearly doubled its worldwide manufacturing capacity in recent years, including the new Tampines Campus, and has invested more than US$400 million in semiconductor equipment manufacturing infrastructure in the United States over the past five years. Applied Materials is also preparing to bring its new US$5 billion EPIC Center in Silicon Valley into operation this year. The facility is expected to become the largest U.S. investment in advanced semiconductor equipment research and development and is intended to accelerate the commercialization of new semiconductor manufacturing technologies.
Original – Applied Materials
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Wolfspeed has introduced its fifth-generation silicon carbide (SiC) technology platform, delivering significant advances in efficiency and performance for next-generation 1200 V and 750 V automotive and industrial power applications.
The new Gen 5 platform builds on the company’s previous generation technology and is designed to address increasing demands for higher efficiency, greater power density, and improved thermal performance across electric vehicles, charging infrastructure, industrial power supplies, and other high-power systems.
According to Wolfspeed, the latest generation establishes a new benchmark for specific on-resistance (RSP), a key performance metric that measures efficiency relative to the active die area of a MOSFET. The technology is intended to help system designers develop more compact and efficient power conversion systems while supporting higher current capability within the same silicon carbide footprint.
“Gen 4 delivered the switching performance breakthrough our customers needed, and less than two years later we are introducing Gen 5, which provides the highest current capability possible within a 5 x 5 mm silicon carbide footprint,” said Dr. Cengiz Balkas, Chief Business Officer at Wolfspeed. “The technology enables a faster path to more efficient, compact, and robust systems designed for real-world operating conditions.”
The company noted that automotive manufacturers continue to face pressure to achieve electrification goals while addressing challenges related to vehicle cost, safety, driving range, and charging infrastructure. Wolfspeed stated that Gen 5 technology was developed to help address these factors by enabling more compact traction inverter designs, improving vehicle efficiency, and supporting optimization of battery sizing.
Beyond electric vehicle traction systems, the technology is also positioned to support applications such as solid-state circuit breakers, EV charging infrastructure, and industrial power conversion systems that require high efficiency and high-temperature operation.
A key focus of the new platform is increasing current capability within a given silicon carbide die area. Wolfspeed reports that Gen 5-based systems can achieve the highest current levels at elevated operating temperatures when compared with competing silicon carbide MOSFETs using a 5 x 5 mm footprint.
The company has further optimized RDS(ON), addressing two critical design challenges. First, the technology reduces system-level conduction losses through an improvement in specific on-resistance of up to 27% compared with currently available competitive 1200 V silicon carbide solutions. The 1200 V QEM50120-025D10 achieves a chip-level RSP of 3.4 mΩ-cm² at 175°C, while the 750 V QEM50075-025D10 achieves a chip-level RSP of 2.0 mΩ-cm² at the same temperature.
Second, the platform reduces the need for additional system-level design margin through an ultra-low RDS(ON) distribution of ±18% across both voltage classes.
Gen 5 retains the body diode architecture introduced with the previous generation while extending continuous junction temperature capability to 200°C, with limited-life operation supported up to 215°C. Wolfspeed stated that the devices maintain low on-resistance while delivering excellent switching performance and reduced overall switching losses through further improvements in reverse recovery charge characteristics.
The company emphasized that Gen 5 has been developed on a commercially mature manufacturing platform designed to provide a low-risk path from design qualification to high-volume production. This marks the second Wolfspeed MOSFET technology generation to be designed, manufactured, and qualified within the company’s 200 mm device fabrication facility in Mohawk Valley, New York.
All new product introductions, sampling activities, and customer validation programs will utilize 200 mm production material, with no additional manufacturing toolsets required for volume production.
“Our planar MOSFET technology continues to offer significant opportunities for innovation,” said Dr. Adam Barkley, Vice President of Power Device and Package Development at Wolfspeed. “Gen 5 was developed using familiar manufacturing processes and tools to provide customers with a low-risk upgrade path for next-generation programs. This approach enables faster validation, qualification, and time-to-market while maintaining the performance and reliability customers expect.”
Samples of the QEM50120-025D10 and QEM50075-025D10 devices are currently available to select customers through Wolfspeed’s direct sales channels. The company expects to introduce additional 750 V and 1200 V Gen 5 products throughout 2026 and into early 2027 based on customer requirements and market demand.
Original – Wolfspeed
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Nexperia B.V. and Semikron Danfoss GmbH have signed a Memorandum of Understanding (MoU) to explore a strategic collaboration focused on silicon carbide (SiC)-based power modules for automotive traction inverter applications. The initiative aims to combine Nexperia’s expertise in SiC semiconductor technology with Semikron Danfoss’ capabilities in power module packaging and integration to evaluate the development of high-performance, scalable solutions for next-generation electric vehicles.
As the automotive industry continues to increase the adoption of SiC technology in electric drivetrains, the demand for solutions that improve efficiency, power density, and overall vehicle performance continues to grow. Through this collaboration, the two companies intend to leverage their complementary strengths across the value chain, from semiconductor devices to fully integrated power modules, to address the evolving requirements of automotive applications.
The companies will explore joint engineering approaches, including early-stage integration and co-design methodologies, with the objective of maximizing the performance potential of SiC-based power systems.
Commenting on the agreement, Carsten Götte, Senior Vice President of the Automotive Power Modules Division at Semikron Danfoss, said the combination of Nexperia’s semiconductor expertise and Semikron Danfoss’ module capabilities creates an opportunity to explore solutions that could deliver additional value to customers in the rapidly developing electric vehicle market.
Edoardo Merli, Senior Vice President and Head of the Wide Bandgap, IGBT & Modules (WIM) Business Group at Nexperia, highlighted the importance of industry partnerships in advancing the adoption of wide-bandgap technologies such as SiC and gallium nitride (GaN). He noted that Nexperia’s ongoing investments in research and development, together with a focus on early-stage collaboration, support the alignment of semiconductor and system requirements from the outset of product development.
The Memorandum of Understanding was signed on June 8, 2026, by Stefan Tilger, Nexperia’s Interim Chief Executive Officer, and Carsten Götte, Senior Vice President of the Semikron Danfoss Automotive Power Modules Division.
Both companies share strong European roots and extensive experience in the power electronics industry, providing a foundation for exploring future opportunities in automotive power semiconductor and module technologies.
Original – Semikron Danfoss
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onsemi has introduced GaNEXUS™, a new gallium nitride (GaN) power portfolio designed to deliver higher efficiency, increased power density, and improved thermal performance across a broad range of applications, including AI data centers, industrial automation, robotics, and energy infrastructure.
The initial GaNEXUS portfolio includes GaN FETs spanning voltage ranges from 40 V to 650 V, as well as 650 V GaNEXUS Smart devices that integrate protection features to simplify system design and improve reliability. These products are currently available for sampling.
The launch expands onsemi’s intelligent power portfolio and complements the company’s existing silicon and EliteSiC technologies. By offering multiple semiconductor technologies within a unified portfolio, onsemi aims to provide customers with greater flexibility in optimizing efficiency, thermal performance, system size, and total cost across a wide range of power conversion architectures.
The new portfolio targets applications with growing power requirements, including AI data center power delivery, 48 V power systems, robotics, industrial automation equipment, and energy infrastructure. As AI infrastructure, electrification, and industrial automation continue to accelerate, designers face increasing challenges related to energy consumption, cooling requirements, and system footprint. According to onsemi, AI data centers alone are expected to account for up to 9% of U.S. electricity generation by 2030, while power and cooling can represent up to 40% of total data center operating expenses.
GaNEXUS technology addresses these challenges through faster switching speeds, lower switching losses, higher power density, and improved thermal performance compared with conventional silicon-based solutions. These characteristics enable reductions in the size of magnetic components and cooling systems while improving overall efficiency and responsiveness and lowering system costs in applications ranging from AI data center power delivery and electric vehicle charging to robotics and industrial power systems.
Antoine Jalabert, Vice President of the GaN Division at onsemi, stated that the GaNEXUS portfolio is enabling new approaches to power system design by providing engineers with greater flexibility to address constraints that have traditionally limited conventional power architectures.
When combined with onsemi’s Treo platform for integrated sensing, control, protection, and power management, GaNEXUS devices can be deployed as part of complete system-level power solutions. This approach is intended to simplify design complexity, accelerate development and qualification cycles, reduce thermal and cooling requirements, and optimize performance throughout the power delivery chain.
In low- and medium-voltage applications, including AI server 48 V intermediate bus converters (IBCs), battery backup units (BBUs), and motor drives, GaNEXUS technology enables approximately 30% to 60% smaller magnetic components, 1.5x to 2x higher power density, and efficiency improvements ranging from 0.5% to 2%, depending on system topology. Additional benefits include reduced switching losses, enhanced thermal performance, and improved control stability.
For higher-voltage applications such as AI power shelves, high-voltage DC-DC conversion, power factor correction (PFC), and LLC power stages, GaNEXUS enables up to 60% reductions in magnetic component size in high-frequency AC-DC and resonant converter stages. The technology can also provide 1.5x to 2x higher power density and efficiency gains of approximately 0.5% to 1%, contributing to lower thermal stress and reduced operating costs in high-power systems. The integrated protection capabilities of GaNEXUS Smart devices further simplify power stage design and support faster qualification processes.
The GaNEXUS portfolio is offered in thermally enhanced package options with industry-standard footprints to support design flexibility and dual sourcing strategies. Available package formats include TOLL Bottom Cooling, TOLT Top Cooling, and dual-cooled 3.3 mm × 3.3 mm and 5 mm × 6 mm packages.
Original – onsemi
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JCET Group has introduced its next-generation high-density 3D power module packaging and test solution targeting AI data center applications. Based on the company’s XDPKG-3DSiP (3D System-in-Package) technology platform, the new solution combines high-density multilayer interconnects with a three-dimensional module architecture to enhance power density, energy efficiency, thermal performance, and long-term reliability in advanced computing environments.
The solution integrates power devices, passive components, interconnect structures, and thermal management pathways within a compact package footprint, providing a more efficient and stable platform for next-generation AI computing infrastructure.
JCET offers turnkey packaging and testing services covering both power management integrated circuits (PMICs) and power modules. At the wafer level, the company provides highly consistent bumping services along with specialized wafer-level processes for power management ICs and DrMOS devices. These capabilities establish the foundation for subsequent system integration and are complemented by JCET’s support for System-in-Package (SiP) module assembly and testing, enabling a streamlined transition from chip-level interconnects to complete system-level modules.
To improve power conversion efficiency, JCET has optimized package architecture, interconnect routing, parasitic characteristics, and thermal pathways. The company also incorporates advanced technologies such as copper pillar interconnects and high-density packaging techniques. These enhancements enable power modules to achieve higher energy conversion efficiency under heavy-load operating conditions, helping customers improve server efficiency while reducing the burden on power delivery and cooling systems.
Reliability is a key focus of the new solution. Through the use of ECP substrates, copper pillar interconnects, and a comprehensive lifecycle quality management framework, JCET has strengthened the mechanical robustness and electrical stability of its power modules. The solution is designed to perform under high-current-density operation, prolonged heavy-load conditions, thermal cycling, power cycling, and system-level thermal stress, supporting the stringent uptime and availability requirements of modern AI data centers.
To further increase power density, the company has adopted multilayer stacking techniques, multidimensional structural design, high thermal conductivity interface materials, top-side cooling technology, and vacuum reflow processes. These innovations enable higher integration levels and more compact module designs. Under comparable thermal and design constraints, the new solution delivers more than a 20% increase in power density compared with the previous generation of similar solutions. This improvement allows data center operators to support greater computing workloads within the same rack and board-level footprint while providing additional flexibility in AI server design.
JCET also supports customer product development through advanced co-design and simulation capabilities. By creating virtual digital prototypes and performing coupled electrical, thermal, and mechanical multiphysics simulations, the company enables early-stage optimization of power integrity, thermal performance, and structural reliability. This approach helps reduce development time while improving overall product robustness.
The company noted that demand for its high-density power management solutions has grown rapidly since 2025, particularly in markets focused on high-performance computing. JCET’s capabilities have gained recognition among leading domestic and international customers, and the company reports continued strong market momentum.
Dr. Rebecca Chen, Vice President of JCET and General Manager of the AI & Smart Industry Business Unit, said the company has built a comprehensive portfolio of packaging and test solutions for AI data centers through sustained investment in advanced packaging and system-level integration technologies. She noted that the portfolio spans computing, memory, connectivity, and power applications, strengthening JCET’s position across the AI data center value chain.
Looking ahead, JCET plans to further leverage its end-to-end capabilities in co-design, system-level integration, and testing, together with its global manufacturing network, to collaborate closely with customers and ecosystem partners worldwide in advancing power management technologies for AI data center applications.
Original – JCET
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Nexperia has announced the launch of its 1200 V silicon carbide (SiC) MOSFET portfolio in QDPAK packaging, expanding its wide-bandgap (WBG) product family with a top-side cooled surface-mount solution designed for high-power-density and thermally demanding applications.
The new devices are engineered for high-efficiency, high-voltage power conversion systems, combining the electrical performance of Nexperia’s SiC technology with simplified thermal management and mechanical integration. The result is improved power density, higher output power capability, enhanced efficiency, and better thermal performance in compact system designs.
Available in both industrial-grade and automotive-qualified versions, the portfolio includes RDS(on) options of 17 mΩ, 30 mΩ, 40 mΩ, 60 mΩ, and 80 mΩ. This range provides a scalable QDPAK platform suitable for applications spanning high-power industrial systems to space-constrained designs with demanding thermal and mechanical requirements. The addition of QDPAK complements Nexperia’s existing package portfolio and offers designers greater flexibility in optimizing efficiency, thermal performance, and power density.
The QDPAK package addresses one of the key challenges in high-voltage power conversion systems: effective heat dissipation. By enabling a direct thermal path from the semiconductor die to the heatsink through the top side of the package, the design reduces dependence on the PCB as the primary heat-spreading medium. This allows the thermal management of the semiconductor and PCB to be handled more independently, simplifying overall system design.
According to Nexperia, compared with conventional D2PAK-7 packaging, top-side cooled solutions can deliver up to 3 kW higher output power while operating within comparable thermal limits. They can also provide approximately 40°C additional thermal headroom at the same power level. Building on the company’s existing X.PAK platform, the QDPAK package further extends power handling capability, enabling operation at roughly 3 kW higher power levels at similar case temperatures while offering around 23°C additional thermal headroom under comparable operating conditions.
The devices are well suited for a wide range of applications, including electric vehicle onboard chargers (OBCs), high-voltage DC-DC converters, EV charging infrastructure, photovoltaic inverters, uninterruptible power supplies (UPS), motor drives, and data center power systems. The package enables engineers to optimize both electrical and mechanical aspects of system design while addressing increasingly stringent power density requirements.
Gaetano Pignataro, Head of the SiC & IGBT Product Group at Nexperia, said that as wide-bandgap technologies continue to transform power conversion design, engineers are facing new thermal, mechanical, and efficiency challenges as systems become more compact, denser, and more power intensive. He noted that the company’s 1200 V SiC MOSFETs in QDPAK combine the performance advantages of its SiC technology with the thermal benefits of top-side cooling, providing designers with a practical and scalable solution for next-generation high-power applications.
Nexperia’s 1200 V SiC MOSFETs in QDPAK packaging combine the advantages of top-side cooled surface-mount technology with the electrical characteristics required for efficient high-voltage power conversion. The devices feature excellent RDS(on) temperature stability, supporting predictable conduction losses and reliable operation at elevated junction temperatures. Their low-inductance package design and controlled switching behavior contribute to efficient operation, while the inclusion of a dedicated Kelvin source pin enables faster commutation and improved switching control. This helps designers reduce ringing, manage electromagnetic interference (EMI), and improve overall switching performance in demanding power applications.
Original – Nexperia
