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STMicroelectronics (ST) has announced its financial results for the third quarter ended September 27, 2025, reporting net revenues of $3.19 billion, a gross margin of 33.2%, operating income of $180 million, and net income of $237 million, or $0.26 per diluted share. On a non-U.S. GAAP basis, the company recorded operating income of $217 million and net income of $267 million, or $0.29 per diluted share.
President and CEO Jean-Marc Chery said third-quarter revenue came in slightly above the midpoint of the company’s guidance, supported by stronger demand in Personal Electronics. Automotive and Industrial segments performed as expected, while the Communications, Equipment, Computers, and Peripherals (CECP) segment remained in line with projections. Gross margin was slightly below expectations, mainly due to product mix effects within the Automotive and Industrial divisions.
Compared to the same quarter last year, ST’s net revenue decreased by 2%, while the non-U.S. GAAP operating margin declined to 6.8% from 11.7%. Non-U.S. GAAP net income fell to $267 million from $351 million a year earlier.
The company reported a book-to-bill ratio above one during the third quarter, with Automotive above parity and Industrial at parity—indicating ongoing demand stability in key end markets.
For the fourth quarter, ST expects net revenues around $3.28 billion, representing a sequential increase of about 2.9%, and a gross margin of approximately 35.0%, which includes around 290 basis points of unused capacity charges.
At the midpoint of its outlook, ST projects full-year 2025 revenues of approximately $11.75 billion, reflecting a 22.4% increase in the second half compared to the first half—an encouraging signal of recovery across its core markets. The company expects full-year gross margin to be about 33.8%.
Chery said ST has adjusted its capital expenditure plans to align with current market conditions, now targeting slightly below $2 billion in net Capex for 2025.
“Our strategic priorities remain clear,” he said. “We continue to accelerate innovation, execute our company-wide program to reshape our manufacturing footprint and cost structure, and strengthen free cash flow generation. These actions are positioning ST for sustainable growth as market conditions improve.”
Original – STMicroelectronics
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STMicroelectronics has revealed a complete prototype of its new power delivery system designed to support NVIDIA’s 800 VDC architecture for next-generation AI data centers. The company’s announcement underscores its leadership in developing semiconductor technologies that meet the rising power and efficiency demands of large-scale AI computing infrastructure.
As AI workloads grow rapidly, traditional 54 V power distribution systems are reaching their limits. The shift to 800 VDC architectures enables megawatt-scale compute racks that are more efficient, require less copper, and simplify overall system design. STMicroelectronics is contributing to this transition with a portfolio that integrates silicon carbide (SiC), gallium nitride (GaN), and silicon technologies optimized for high-voltage, high-efficiency applications.
At the OCP Global Summit 2025, ST presented a major development milestone: a compact 12 kW GaN-based LLC power delivery board roughly the size of a smartphone. Operating from an 800 V input and switching at 1 MHz, the prototype achieved more than 98 percent efficiency and a record power density of over 2,600 W/in³ at 50 V output.
The new system addresses key design challenges in power density, thermal management, efficiency, and reliability—critical factors for deploying megawatt-scale AI compute systems while lowering infrastructure complexity and cost.
STMicroelectronics’ achievement represents a significant step forward in enabling high-performance, energy-efficient power delivery solutions for the emerging generation of hyperscale AI data centers built on 800 VDC architectures.
Original – STMicroelectronics
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STMicroelectronics announced new details regarding the development of the next generations of Panel-Level Packaging (PLP) technology through a pilot line in its Tours site, France, which is expected to be operational in Q3 2026.
PLP is an advanced, automated chip packaging and test process technology bringing increased manufacturing efficiency and reducing costs, and a key enabler for creating the next generation of smaller, more powerful, and cost-effective electronic devices. The large-area carrier in PLP (large rectangular shapes in place of circular wafers) enables higher manufacturing throughput, making it a more efficient solution for high-volume production.
Building on its first-generation PLP line in operation in Malaysia and its global technology R&D network, ST plans to develop the next generations of its PLP technology to maintain its technological leadership and extend the use of PLP across many other ST products for automotive, industrial and consumer applications.
“The development of our PLP capabilities in our Tours site is aimed at advancing this innovative approach to chip packaging and test manufacturing technology, boosting efficiency and flexibility so it can be rolled out across a wide portfolio of applications, including RF, analog, power and microcontrollers. A multidisciplinary team of experts in manufacturing automation, process engineering, data science and analytics, as well as technology and product R&D, will collaborate on this program, which is a key part of a larger strategic initiative focused on heterogeneous integration – a scalable, efficient new approach to chip integration,” said Fabio Gualandris, President Quality, Manufacturing and Technology of STMicroelectronics. “With our fab in Malta, ST has already demonstrated its capability to deliver high-performing chip packaging and test in Europe. As we reshape our global manufacturing footprint, this new initiative in Tours will expand our process, design and manufacturing innovation capabilities supporting the development of next-generation chips in Europe”.
The development of the new PLP pilot line in Tours is supported by a capital investment of over $60 million, already allocated as part of the company-wide program to reshape the Company’s manufacturing footprint. Additional synergies are expected with the local R&D ecosystem, including the CERTEM R&D center. As previously announced, this program is focused on advanced manufacturing infrastructure and brings redefined missions for some sites in France and Italy to support their long-term success.
For decades, the industry has relied on wafer-level packaging (WLP) and flip-chip technology to connect silicon chips to external circuitry. However, as devices become smaller and more complex, these methods have begun to reach their limits in terms of scalability and cost-effectiveness. For advanced packaging, different approaches exist or are under development; PLP is one of them.
Panel Level Packaging is a method where multiple ICs are packaged on a single, larger rectangular substrate panel, rather than on individual circular wafers. This allows for more ICs to be processed simultaneously, reducing costs and improving throughput.
ST has not only adopted PLP-DCI but has also been at the forefront of its development since 2020. The company’s research and development teams have worked to prototype and scale the technology, culminating in a state-of-the-art PLP-DCI process currently in production at very high volumes of over 5 million units per day on a highly automated line using very large, 700x700mm panels.
ST’s PLP technology focuses on Direct Copper Interconnect (DCI). Direct copper interconnections replace the traditional wire connections of chips with their encapsulation support. DCI is the process by which these ICs are electrically connected to the panel substrate using copper, which is known for its excellent electrical conductivity. DCI offers superior performance compared to traditional methods that use solder bumps, which can be less reliable. This technology with direct connection without wire supports new product development by reducing power losses (such as resistance and inductance), enhancing heat dissipation and enabling miniaturization. This leads to better overall power density.
PLP-DCI also allows the integration of multiple chips within advanced packages, known as System in Package (SiP).
Original – STMicroelectronics
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STMicroelectronics N.V. reported U.S. GAAP financial results for the second quarter ended June 28, 2025.
ST reported second quarter net revenues of $2.77 billion, gross margin of 33.5%, operating loss of $133 million, and net loss of $97 million or -$0.11 diluted earnings per share (non-U.S. GAAP operating income of $57 million, and non-U.S. GAAP1 net income of $57 million or $0.06 diluted earnings per share).
Jean-Marc Chery, ST President & CEO, commented:
- “Q2 net revenues came above the mid-point of our business outlook range, driven by higher revenues in Personal Electronics and Industrial, while Automotive was slightly below expectations. Gross margin was in line with the mid-point of our business outlook range.”
- “On a year-over-year basis, Q2 net revenues decreased 14.4%, non-U.S. GAAP operating margin decreased to 2.1% from 11.6% and non-U.S. GAAP1 net income decreased to $57 million from $353 million.”
- “First half net revenues decreased 21.1% year-over-year, with a decrease in all reportable segments. Non-U.S. GAAP1 operating margin was 1.3% and non-U.S. GAAP1 net income was $120 million.”
- “In the second quarter, our book-to-bill ratio remained above one for Industrial, while Automotive was below parity. Bookings continued to increase sequentially.”
- “Our third quarter business outlook, at the mid-point, is for net revenues of $3.17 billion, decreasing year-over-year by 2.5% and increasing sequentially by 14.6%; gross margin is expected to be about 33.5%; including about 340 basis points of unused capacity charges. On a sequential basis, our Q3 gross margin will be negatively impacted by about 140 basis points, mainly from currency effect and, to a lesser extent, the start of non-recurring cost related to our manufacturing reshaping program.”
- “While we expect Q3 revenues to show a solid sequential growth enabling a continued year-over-year improvement, we are still operating amid an uncertain macroeconomic environment. Given these external factors, our priorities remain supporting our customers, accelerating new product introductions, and executing our company-wide program to reshape our manufacturing footprint and resize our global cost base.”
Original – STMicroelectronics
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STMicroelectronics has announced its financial results for the first quarter of 2025, reflecting both the challenges of a shifting market and the company’s strategic transformation efforts.
Key Highlights:
- Net Revenues: $2.52 billion, down 27.3% year-over-year
- Gross Margin: 33.4%
- Operating Income: $3 million
- Net Income: $56 million, representing an 89.1% drop compared to Q1 2024
CEO Jean-Marc Chery acknowledged that while Q1 revenues aligned with expectations, the decline was mainly attributed to lower performance in the Automotive and Industrial sectors, partially offset by stronger results in Personal Electronics.
Despite the decline, ST’s book-to-bill ratio improved, particularly within Automotive and Industrial, signaling stronger order intake compared to shipments.
Looking Ahead:
- ST expects Q2 2025 net revenues of approximately $2.71 billion, a sequential growth of 7.7%.
- Gross margin is forecasted to remain steady at around 33.4%, impacted by unused capacity charges.
- The company is maintaining its 2025 net CapEx target between $2.0 billion and $2.3 billion to support its manufacturing reshaping initiatives.
Strategic Initiatives: STMicroelectronics is pushing forward with its company-wide restructuring program, aiming to reshape its manufacturing footprint and resize its global cost base. The program targets annual cost savings in the high triple-digit million-dollar range by the end of 2027.
Chery emphasized that ST views Q1 2025 as the bottom of the cycle and is focused on innovation, manufacturing efficiency, and cost control to navigate the uncertain global environment.
Segment Performance:
- Analog, Power & Discrete, MEMS and Sensors (APMS): Revenues down 28% YoY
- Power and Discrete Products (P&D): Revenues fell 37.1% YoY, operating margin turned negative
- Embedded Processing (EMP): Revenues declined 29.1% YoY
- RF & Optical Communications (RF&OC): Revenues down 19.2% YoY
Financial Strength:
- Free cash flow turned positive at $30 million, compared to a negative $134 million a year ago.
- Net financial position remained robust at $3.08 billion.
Original – STMicroelectronics
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STMicroelectronics N.V. disclosed further elements of its program to reshape its global manufacturing footprint. This comes as part of the program announced in October 2024 to further strengthen ST’s competitiveness, solidify its position as a global semiconductor leader, and ensure the long-term sustainability of its model as an Integrated Device Manufacturer by leveraging strategic assets globally across technology R&D, design and high-volume manufacturing.
Jean-Marc Chery, President and CEO of STMicroelectronics said: “The reshaping of our manufacturing footprint announced today will future proof our Integrated Device Manufacturer model with strategic assets in Europe and improve our ability to innovate even faster, benefitting all our stakeholders. As we focus on advanced manufacturing infrastructure and mainstream technologies, we will continue to leverage all of our existing sites and bring redefined missions for some of them to support their long-term success. We are committed to managing this program responsibly, according to our long-established values, and exclusively through voluntary measures. The technology R&D, design, and high-volume manufacturing activities in Italy and France will continue to be central to our global operations and will be reinforced via planned investments in mainstream technologies”.
Innovating and scaling up to increase efficiency across manufacturing operations
As innovation cycles shorten, ST’s manufacturing strategy is evolving to accelerate the delivery of innovative, proprietary technologies and products at scale to customers globally, across automotive, industrial, personal electronics and communication infrastructure applications.The reshaping and modernization of ST’s manufacturing operations aim to achieve two main objectives: prioritizing planned investments towards future-ready infrastructure such as 300mm silicon and 200mm silicon carbide wafer fabs to enable them to reach a critical scale and maximizing the productivity and efficiency of legacy 150mm capabilities and mature 200mm capabilities. In parallel, ST plans to continue to invest in upgrading the technology used across its operations, deploying additional AI and automation for additional efficiency in technology R&D, manufacturing, reliability and qualification processes, with a continued focus on sustainability.
Strengthening ST’s manufacturing ecosystem
Over the next three years, the reshaping of ST’s manufacturing footprint will design and strengthen ST’s complementary ecosystems: in France around digital technologies, in Italy around analog and power technologies and in Singapore on mature technologies. The optimization of these operations aim to achieve full capacity utilization and drive technological differentiation to compete globally. As announced previously, each of ST’s current sites will continue to play a long-term role within the company’s global operations.Building 300mm silicon megafabs in Agrate and Crolles
The Agrate (Italy) 300mm fab will continue to be scaled up, with the aim to become ST’s flagship high-volume manufacturing facility for smart power and mixed signal technologies. The plan is to double its current capacity to 4,000 wafers per week (wpw) by 2027, with planned modular expansions increasing capacity up to 14,000 wpw, depending on market conditions. As we increase our focus on 300mm manufacturing, the Agrate 200mm fab will refocus on MEMS.The Crolles (France) 300mm fab will be further cemented as the core of ST’s digital products ecosystem. The plan is to increase capacity to 14,000 wpw by 2027 with planned modular expansions increasing capacity up to 20,000 wpw, depending on market conditions. In addition, we will convert the Crolles 200mm fab to support Electrical Wafer Sorting high volume manufacturing and advanced packaging technologies, hosting activities that do not exist today in Europe. The focus will be on next-generation leading technologies including optical sensing and silicon photonics.
Specialized Manufacturing and Competence Center for Power Electronics in Catania
Catania will continue to serve as a center of excellence for power and wide-bandgap semiconductor devices. The development of the new Silicon Carbide Campus is progressing as planned, with production of 200mm wafers set to begin in Q4 2025, reinforcing ST’s leadership in next-generation power technologies. Our resources supporting Catania’s current 150mm and EWS capabilities will be refocused on 200mm silicon carbide and silicon power semiconductor production, including GaN-on-silicon, reinforcing ST’s leadership in next-generation power technologies.Optimizing Other Manufacturing Sites
Rousset (France) will remain focused on 200mm manufacturing, with additional volumes reallocated from other sites enabling full saturation of existing manufacturing capacity for optimized efficiency.Tours (France) will remain focused on its 200mm silicon production line for select technologies, while other activities – including legacy 150mm manufacturing activities – will be transferred to different ST sites, and it will also remain a center of competence for GaN, mainly on epitaxy. The Tours site will also host a new activity: panel-level-packaging, one of the major enablers of chiplets, a technology for complex semiconductor applications that will be key for ST in the future.
Ang Mo Kio (Singapore), ST’s high-volume fab for mature technologies, will remain focused on 200mm silicon manufacturing and will also host our consolidated global legacy 150mm silicon capabilities.
Kirkop (Malta), ST’s high-volume test and packaging fab in Europe will be upgraded, with the addition of advanced automated technologies which will be key to support next-generation products.
Workforce and skills evolution
As ST reshapes its manufacturing footprint over the next three years, the workforce size and required skill sets will evolve. Advanced manufacturing will shift roles from legacy processes involving repetitive manual tasks to a stronger focus on process control, automation, and design. ST will manage this transition through voluntary measures, with a continued commitment to ongoing constructive dialogue and negotiations with employee representatives in accordance with applicable national regulations. Based on current projections, the program is expected to see up to 2,800 people leaving the company globally on a voluntary basis, on top of normal attrition. These changes are expected to occur mainly in 2026 and 2027. Regular updates will be provided to stakeholders as the program progresses.Original – STMicroelectronics
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STMicroelectronics and Innoscience announced the signature of an agreement on GaN technology development and manufacturing, leveraging the strengths of each company to enhance GaN power solutions and supply chain resilience.
The companies have agreed on a joint development initiative on GaN power technology, to advance the promising future of GaN power for consumer electronics, datacenters, automotive and industrial power systems and many more applications in the coming years. In addition, the agreement allows Innoscience to utilize ST’s front-end manufacturing capacity outside China for its GaN wafers, while ST can leverage Innoscience’s front-end manufacturing capacity in China for its own GaN wafers. The common ambition is for each company to expand their individual offering in GaN with supply chain flexibility and resilience to cover all customers’ requirements in a wide range of applications.
Marco Cassis, President, Analog, Power & Discrete, MEMS and Sensors of STMicroelectronics declared: “ST and Innoscience are both Integrated Device Manufacturers, and with this agreement we will leverage this model to the benefit of our customers globally. First, ST will be accelerating its roadmap in GaN power technology to complement its silicon and silicon carbide offering. Second, ST will be able to leverage a flexible manufacturing model to serve customers globally.”
Dr. Weiwei Luo, Chairman and Founder of Innoscience, stated “GaN technology is essential to improve electronics, creating smaller and more efficient systems which save electric power, lower cost, and reduce CO2 Emissions. Innoscience pioneered mass production of 8-inch GaN technology and has shipped over 1 billion GaN devices into multiple markets, and we are very excited to move into strategic collaboration with ST. The joint collaboration between ST and Innoscience will further expand and accelerate the adoption of GaN technology. Together the teams at Innoscience and ST will develop the next generations of GaN technology”.
GaN power devices leverage fundamental material properties that enable new standards of system performance in power conversion, motion control, and actuation, offering significantly lower losses, which allows for enhanced efficiency, smaller size, and lighter weight, thus reducing the overall solution cost and carbon footprint; these devices are rapidly being adopted in consumer electronics, data center and industrial power supplies, and solar inverters, and are being actively designed into next-generation EV powertrains due to their substantial size and weight reduction benefits.
Original – STMicroelectronics
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STMicroelectronics announced its financial results for the fourth quarter and full year of 2024, highlighting both its revenue performance and future strategic initiatives. In Q4 2024, the company reported net revenues of $3.32 billion, a gross margin of 37.7%, and an operating margin of 11.1%. Net income for the quarter stood at $341 million, reflecting ST’s ability to maintain profitability despite a challenging macroeconomic environment.
For the full year, ST achieved net revenues of $13.27 billion, a gross margin of 39.3%, and an operating margin of 12.6%, with a total net income of $1.56 billion. While the semiconductor industry faced fluctuations in demand, ST maintained solid financials, supported by its diversified portfolio across automotive, industrial, and consumer electronics markets.
Looking ahead to Q1 2025, the company projects net revenues of approximately $2.51 billion and anticipates a gross margin of 33.8%. This outlook suggests a seasonal decline in revenue compared to Q4, but aligns with broader industry trends.
In response to shifting market conditions, ST has initiated a cost-resizing program to optimize its global operational efficiency. This includes measures to streamline expenses, enhance supply chain resilience, and align production capacities with evolving customer demand. The company is also expected to continue investing in next-generation semiconductor technologies, particularly in power electronics, automotive chips, and industrial applications.
CEO Jean-Marc Chery reaffirmed ST’s commitment to long-term growth and sustainability, emphasizing its focus on innovation and cost discipline.
With strategic investments and market adaptability, STMicroelectronics aims to navigate industry challenges while reinforcing its leadership in the semiconductor sector.
Original – STMicroelectronics
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STMicroelectronics announced that its Supervisory Board has agreed to propose for shareholders’ approval at the Company’s 2025 Annual General Meeting the appointment of Werner Lieberherr to the Supervisory Board of ST, in replacement of Janet Davidson whose mandate will expire at the end of the 2025 AGM.
Werner Lieberherr has successfully led global companies in energy, aviation and automotive in the United States, Asia, Europe and Switzerland, most recently at Landis+Gyr AG, an integrated energy management solutions provider, as Chief Executive Officer.
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STMicroelectronics has been recognized for the first time as a global Top Employer for 2025 by Top Employers Institute.
This year STMicroelectronics was one of only 17 global Top Employers to be recognized by Top Employers Institute for their outstanding HR policies and practices worldwide, covering ST entities in 41 countries. The Top Employers Institute program certifies organizations based on the participation and results of their HR Best Practices Survey. STMicroelectronics was distinguished in this ranking thanks to a continuous improvement approach and stands out particularly in the themes of Ethics & Integrity, Purpose & Values, Organization & Change, Business Strategy, and Performance.
“A couple of years ago, we began a people-centric transformation to enhance our leadership culture, simplify and digitalize people processes, with the employee journey and experience as our north star. Achieving the Top Employer Global certification confirms that our efforts are well-directed, and that ST is a place where every talent can thrive, regardless of their career stage or perspective,” said Rajita D’Souza, President, Human Resources & Corporate Social Responsibility, STMicroelectronics.
“We’re excited that STMicroelectronics certified as a global Top Employer for the first time. They have particularly showcased their strengths in areas such as Organisation & Change, Ethics & Integrity, Purpose & Values and Business Strategy. This Certification shows ST’s commitment to creating a better world of work through their HR initiatives and practices, by demonstrating how they support their colleagues across 41 countries,” said David Plink, CEO Top Employers Institute.
The Top Employers Institute survey, followed by validation and audit, covers six HR domains consisting of 20 topics including People Strategy, Work Environment, Talent Acquisition, Learning, Diversity & Inclusion, Wellbeing and more. The program has certified and recognized over 2,400 Top Employers in 125 countries/regions across five continents.
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