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LATEST NEWS / SiC / WBG3 Min Read
CISSOID announced that its SiC Inverter Control Module (ICM) has been adopted by Hydro Leduc, a renowned manufacturer of hydraulic components, for its new highly efficient and modular Electric Power Take-Off (ePTO). This new ePTO solution supports the electrification of trucks and other off-road vehicles. CISSOID’s ICM not only powers and controls Hydro Leduc’s compact and efficient inverter but also contributed to greatly accelerate its development cycle.
Hydro Leduc’s new ePTO solution offers an optimized hydraulic supply to high power tools in e-trucks and other off-road vehicles that remain driven by hydraulic actuators. Hydro Leduc’s new ePTO represents a significant advancement in electric and hydraulic transmissions with their ME230, a 76 kW brushless electric motor designed to be paired with an inverter for applications up to 650Vdc.
This motor, compatible with DIN ISO14 standards and equipped with an efficient cooling system, forms a complete solution with the new series of fixed displacement spherical piston pumps: the XRe, available in 41 or 63 cm³ displacements.
Specially adapted for E-PTO mounting, the XRe series is quiet and offers remarkable efficiency, reduced pulsations due to its 9-piston design, and high speed in self-priming mode. Together, the ME230 and XRe provide high-performance and efficient electro-hydraulic solutions for a variety of applications.
CISSOID’s ICM optimally integrates a 3-Phase 1200V/340A-550A SiC Power Module, enabling efficient power conversion, a gate driver board designed for safe driving of the fast-switching SiC transistors, and a control board embedding a powerful real-time microprocessor. This hardware platform has been delivered together with the OLEA® APP INVERTER software optimized for the efficient and safe control of electric motors.
Olivier Savinois, Managing Director at EL MOTION (the sister company of Hydro Leduc, specialized in the design and manufacturing of electrical components and motors), said “We have been very pleased to work with CISSOID on the development of our new ePTO inverter. Not only did their SiC Inverter Control Module completely match our needs, we also enjoyed outstanding support from their team. Especially due to the on-site calibration of our inverter and motor, during the design and validation phases. CISSOID’s modular inverter platform ties perfectly with our scalable ePTO solution.”
Emmanuel Poli, VP Sales at CISSOID, said: “It was really exciting to work with the Hydro Leduc team, who rapidly understood how powerful it would be to leverage our ICM to accelerate the design of their inverter. We were impressed by the speed and agility of Hydro Leduc’s engineers in integrating our hardware and software solution into their motor drive.”
Original – CISSOID
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LATEST NEWS / PRODUCT & TECHNOLOGY / SiC / WBG
Axus Technology Introduced Industry’s Lowest Cost of Ownership for CMP Processes on 200mm SiC Wafers
2 Min ReadAxus Technology, a leading global provider of chemical mechanical planarization (CMP) equipment, critical for semiconductor and compound semiconductor fabrication, announced its flagship CapstoneÆ CS200 platform tools offer the industry’s lowest cost of ownership (CoO) for CMP processes on 200mm silicon carbide (SiC) wafers. Compared to its closest competitor, Axus’s small-footprint Capstone delivers twice the throughput at less than half the total cost per wafer.
Yole Group forecasts the overall SiC manufacturing tool market to top US$4.4 billion by 2029. “The unique properties of SiC require specialized manufacturing tools and lines for processing power SiC devices,” the market analyst firm noted earlier this year. Axus anticipated this need, designing the state-of-the-art Capstone from the ground up to deliver advanced processing capabilities for SiC in power electronics and other applications.
“Many 200mm fabs are looking to upgrade their installed base of CMP tools to products with leading-edge capability and functionality. Our ability to deliver industry-low CoO further underscores our strong market position and capacity to support this shift,” said Axus Technology CEO Dan Trojan. “Capstone features a streamlined workflow and integrated cleaning capability, so it requires half the process steps of older CMP tools. This allows customers to greatly lower their capex investment.”
Key Capstone CoO advantages vs. competitor
- Throughput: 2.5x wafers per hour
- Power consumption: 60% lower
- DI water consumption: 80% lower
- Footprint: 45% smaller
- Capex cost per wafer: 65% lower
- Total cost per wafer: 50% lower
Another factor contributing to Capstone’s lower CoO is its built-in Process Temperature Control (PTC) technology, which enables processing at higher pressures and speeds without exceeding temperature limits of polishing pads and other sensitive components. This feature is vital for SiC and other materials with high hardness and planarization challenges that necessitate more aggressive process conditions.
Axus built its proprietary CoO model using its own system specifications, publicly available specs for competitive tools, actual consumables costs, and real-world performance data supplied by customers. The comprehensive model factors in all CoO contributors: process variables (polish time and removal rates), polishing and cleaning consumables, power and deionized (DI) water usage, system footprint, and equipment capex including cost, utilization and wafer capacity.
Original – Axus Technology
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LATEST NEWS / PRODUCT & TECHNOLOGY / SiC / WBG1 Min Read
Toshiba Electronics Europe GmbH enhances its silicon carbide (SiC) diode portfolio with ten new 1200V Schottky barrier diodes (SBDs). The TRSxxx120Hx series, comprising five products housed in TO-247-2L packages and five in TO-247 packages, helps designers improve the efficiency of industrial equipment, including photovoltaic (PV) inverters, electric vehicle (EV) charging stations, and switching power supplies.
By implementing an enhanced junction barrier Schottky (JBS) structure, the TRSxxx120Hx series allows a very low forward voltage (VF) of just 1.27V (typ.). The merged PiN-Schottky incorporated into a JBS structure reduces diode losses under high current conditions. The TRS40N120H of the new series accepts a forward DC current (IF(DC)) of 40A (max) and a non-repetitive peak forward surge current (IFSM) of 270A (max), with the maximum case temperature (TC) of all devices being +175°C.
Combined with the lower capacitive charge and leakage current, the products help improve system efficiency and simplify thermal design. For instance, at a reverse voltage (VR) of 1200V, the TRS20H120H diode housed in the TO-247-2L package provides a total capacitive charge (QC) of 109nC and reverse current (IR) of 2µA.
Original – Toshiba
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Axcelis Technologies, Inc. will be participating in the International Conference on Silicon Carbide and Related Materials (ICSCRM 2024) taking place September 29 – October 4, 2024, at the Raleigh Convention Center in North Carolina. At the event, Axcelis’ management will be available for one-on-one meetings.
President and CEO of Axcelis, Dr. Russell Low: “We’re excited to participate in ICSCRM 2024, one of the most important technology forums in the power market. Axcelis’ Purion™ Power Series is the technology leader in this market, due to its enabling and highly differentiated features and process control. Ion implant is one of the most critical steps in the manufacturing of Silicon Carbide devices, a market which is estimated by Yole to grow at a 25% CAGR from 2023 – 2029.”
Original – Axcelis Technologies
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GaN / LATEST NEWS / Si / SiC / WBG2 Min Read
JEDEC Solid State Technology Association announced the publication of JEP200: Test Methods for Switching Energy Loss Associated with Output Capacitance Hysteresis in Semiconductor Power Devices. Developed jointly by JEDEC’s JC-70.1 Gallium Nitride and JC-70.2 Silicon Carbide Subcommittees, JEP200 is available for free download from the JEDEC website.
Proliferation of soft switching power conversion topologies brought about the need to accurately quantify the energy stored in a power device’s output capacitance because the energy impacts efficiency of power converters. JEP200, developed in collaboration with academia, addresses the critical power supply industry need to properly test and measure the switching energy loss due to the output capacitance hysteresis in semiconductor power devices and details tests circuits, measurement methods, and data extraction algorithms. The document applies not only to wide bandgap power semiconductors such as GaN and SiC, but also silicon power transistors and diodes.
“Professionals in high-frequency power conversion systems have long sought a standardized approach to testing new switching energy losses,” said Dr. Jaume Roig, Member of Technical Staff, onsemi and Vice Chair of the JC-70 Committee. “This document now provides helpful guidance on testing energy losses related to output capacitance hysteresis caused by displacement currents. With this clarity, system optimization can proceed more accurately.”
“JEDEC’s JC-70 committee has the expertise necessary to meet the demands of the entire power semiconductor industry, and the development of JEP200 demonstrates how the JEDEC process enabled the committee to swiftly respond to an industry need,” said John Kelly, JEDEC President. “JEP200 encompasses GaN, SiC, and Si power devices, helping the industry navigate design challenges caused by the growing number of new power conversion topologies.”
Original – JEDEC