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Navitas Semiconductor announced two new package options for its 5th generation GeneSiC silicon carbide MOSFET platform, introducing a top-side cooled QDPAK package and a low-profile TO-247-4L package with asymmetrical leads. The new devices target applications requiring high power density and improved thermal performance, including AI data centers and energy infrastructure systems.
The devices are based on the company’s fifth-generation trench-assisted planar silicon carbide MOSFET technology. This architecture delivers a 35% improvement in the RDS(on) multiplied by gate-drain charge figure of merit and approximately a 25% improvement in the gate-drain to gate-source charge ratio. Combined with a stable gate threshold voltage greater than 3 V, the design helps prevent parasitic turn-on and enables predictable switching behavior in high-power systems.
The new QDPAK package features a top-side cooling structure designed to address thermal limitations of traditional PCB-based cooling approaches. Heat is transferred directly through the top of the package to a heatsink, improving thermal efficiency and enabling smaller system footprints. The package also reduces parasitic inductance, supporting cleaner switching at high frequencies. It provides a compact footprint of approximately 15 mm by 21 mm with a height of 2.3 mm and includes design features that extend creepage distance while supporting applications up to 1000 VRMS.
Navitas also introduced a low-profile TO-247-4L through-hole package designed for systems where vertical space is constrained. By reducing the height of the package on the PCB, the design enables higher power density compared with conventional TO-247-4 packages. The device also incorporates asymmetrical leads, including thinner leads for the gate and Kelvin-source connections, to improve manufacturing tolerances during PCB assembly.
The new packaging options are intended for applications such as AI data center power supplies and high-performance power conversion systems where compact form factors and efficient thermal management are essential.
The initial products include four 1200 V SiC MOSFETs with on-resistance values of 6.5 mΩ and 12 mΩ, offered in both QDPAK and TO-247-4L packages. Samples are available for customer evaluation.
Original – Navitas Semiconductor
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Navitas Semiconductor announced the launch of its 5th-generation GeneSiC technology platform, built around a new high-voltage silicon carbide Trench-Assisted Planar (TAP) MOSFET architecture. The company said the platform will underpin an industry-leading 1200 V MOSFET family and complements its 4th-generation GeneSiC ultra-high-voltage portfolio at 2300 V and 3300 V, targeting applications such as AI data centers, grid and energy infrastructure, and industrial electrification.
According to Navitas, the 5th-generation platform uses its most compact TAP architecture to combine planar-gate ruggedness with improved performance enabled by a trench structure in the source region. The design focus is to raise efficiency while supporting long-term reliability in high-voltage power conversion.
Navitas said the new 1200 V technology delivers a 35% improvement in the RDS,ON × QGD figure of merit versus the prior-generation 1200 V platform, reducing switching losses and enabling cooler operation and higher switching frequencies. High-speed switching performance is further supported by an approximately 25% improvement in the QGD/QGS ratio. Combined with a stable high threshold voltage specification (VGS,TH ≥ 3 V), the company positions the platform as more immune to parasitic turn-on in high-noise environments.
The 5th-generation technology also targets dynamic performance through an optimized RDS(ON) × EOSS characteristic and adds “Soft Body-Diode” technology intended to improve commutation behavior and reduce electromagnetic interference (EMI) in fast-switching power stages.
For reliability, Navitas said this generation is qualified to an “AEC-Plus” grade for long-term stability in demanding infrastructure applications. The company highlighted extended stress testing for static high-temperature, high-voltage conditions, dynamic reliability tests intended to reflect fast-switching mission profiles, and a focus on threshold voltage stability over prolonged switching stress. Navitas also cited extreme gate oxide reliability, with an extrapolated gate-oxide failure time exceeding 1 million years at operating VGS of 18 V and 175°C, and enhanced cosmic ray robustness aimed at lowering FIT rates for high-uptime environments. Navitas noted that “AEC-Plus” indicates parts exceeding AEC-Q101 and JEDEC standards for reliability testing based on Navitas test results.
“Our customers are redefining the boundaries of power conversion in AI data centers and energy infrastructure, and Navitas is marching along with them in every step of the way,” said Paul Wheeler, VP & GM of Navitas’ SiC Business Unit. “Significant technological improvements in our 5th generation GeneSiC technology underscore Navitas’ commitment to delivering industry-leading performance and reliability in silicon carbide MOSFETs.”
Navitas said a white paper on Trench-Assisted Planar technology is available from the company, and that additional 5th-generation GeneSiC product announcements are expected in the coming months.
Original – Navitas Semiconductor
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Navitas Semiconductor announced participation at the International Conference on Silicon Carbide and Related Materials (ICSCRM) 2023, to be held in Sorrento, Italy.
The ICSCRM conference fosters collaboration and knowledge sharing among the brightest minds in the field. The conference has a rich history dating back to its inaugural meeting in 1987, evolving into a premier global forum for in-depth technical discussions on all aspects of SiC and related materials.
GeneSiC™ power devices, optimized for high-power, high-voltage, and high-reliability SiC applications, address critical markets including electric vehicles, solar energy, energy storage, industrial applications, data centers, and consumer electronics. With an unmatched voltage range spanning from 650 V to 6.5 kV, GeneSiC MOSFETs and Schottky MPS™ diodes have been at the forefront of SiC technology advancement, offering performance and efficiency that pave the way for a more electrified and sustainable future.
Navitas Semiconductor will present two paper sessions at ICSCRM 2023:
- “New Generation SiC MPS Diodes with Low Schottky Barrier Height”
- “650 V SiC Power MOSFETs with Statistically Tight VTH Control and RDS(ON) of 1.92 mΩ-cm²”
Additionally, Navitas’ SVP of SiC Technology & Operations, Dr. Sid Sundaresan, will be chairing the session on Thursday, September 21st. The session, titled “Devices 4: Short circuit, avalanche and reliability,” will focus on crucial topics in the field of SiC technology.
“Navitas’ presence at ICSCRM 2023 is a testament to the company’s unparalleled expertise in SiC technology and its commitment to driving innovation in the industry,” said Dr. Ranbir Singh, Navitas EVP for the GeneSiC business line. “As a pioneer in the field, we continue to extend the boundaries of SiC technology, revolutionizing power semiconductors with cutting-edge GeneSiC™ technology.”
Original – Navitas Semiconductor
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Navitas Semiconductor will reveal a new, high-performance wide bandgap power platform as part of its display at one of Asia’s most prestigious electronics exhibitions – sponsored by Navitas – SEMICON Taiwan 2023, from September 6th-8th.
Visitors will discover the latest gallium nitride (GaN) GaNFast™ power ICs integrate gallium nitride (GaN) power and drive, with control, sensing, and protection to enable faster charging, higher power density, and greater energy savings. Complementary GeneSiC™ power devices are optimized high-power, high-voltage, and high-reliability silicon carbide (SiC) solutions.
Additionally, Navitas will showcase cutting-edge, power-system platforms to dramatically accelerate customer developments, minimize time-to-market, and set new industry benchmarks in energy efficiency, power density and system cost. These system platforms include complete design collateral with fully-tested hardware, embedded software, schematics, bill-of-materials, layout, simulation and hardware test results. Examples include:
- Navitas’ CRPS185 data center power platform, that delivers a full 3,200 W of power in only 1U (40 mm) x 73.5mm x 185 mm (544 cc), achieving 5.9 W/cc, or almost 100 W/in3 power density. This is a 40% size reduction vs, the equivalent legacy silicon approach and reaches over 96.5% efficiency at 30% load, and over 96% stretching from 20% to 60% load, creating a ‘Titanium Plus’ benchmark.
- Navitas’ 6.6 kW 3-in-1 bi-directional EV on-board charger (OBC) with 3 kW DC-DC. This 96%+ efficient unit has over 50% higher power density, and with efficiency over 95%, delivers up to 16% energy savings as compared to competing solutions.
As part of SEMICON’s Power and Opto Semiconductor Forum, Navitas’ Charles Bailley, Senior Director of Business Development, will present “GaN Power ICs Increase Power Density in EV Power Systems”. The presentation is at 2pm, on September 6th, in room 402, 4F, TaiNEX 1.
“Breakthrough high efficiency, high reliability, and high power density – all from the new GaN power IC platform,” said Kevin 汪時民 Wang, Manager of Navitas Taiwan. “The new platform announcement matches SEMICON’s theme of ‘Innovating the World through Semiconductors’ and our own mission to ‘Electrify Our World™’.”
Original – Navitas Semiconductor
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Navitas Semiconductor and Plexim GmbH announced a partnership to release GeneSiC G3™ SiC MOSFET and Gen 5 MPS diode PLECS thermal loss models for highly-accurate simulations of complete power electronics systems.
Power designers can simulate power and thermal losses in various soft- and hard-switching applications. Proprietary GeneSiC trench-assisted planar-gate MOSFET technology delivers the lowest RDS(ON) at high temperature and the highest efficiency at high speeds, and new MPS diodes with ‘low-knee’ characteristics drive unprecedented, industry-leading levels of performance, robustness and quality.
“Accurate, empirically-based simulation models maximize the chance of first-time-accurate designs, accelerating time-to-market and time-to-revenue,” noted Dr. Ranbir Singh, Navitas EVP for the GeneSiC business line. “For the power designer, understanding the leading-edge performance of GeneSiC MOSFETs and MPS diodes with detailed device characteristics, plus power, efficiency and thermal analysis is a critical competitive advantage.”
“The intuitive and highly-efficient PLECS lookup-table based approach to simulating thermal semiconductor losses in complex power electronic circuits is key,” said Kristofer Eberle, Plexim, North America. “Unlike legacy modeling approaches that are not well-suited to new wide bandgap materials, PLECS uses a simplified, but accurate behavioral description to highlight the superior performance of the GeneSiC MOSFETs.”
PLECS models for GeneSiC MOSFETs and MPS diodes are available via genesicsemi.com.
Original – Navitas Semiconductor
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LATEST NEWS / PRODUCT & TECHNOLOGY / SiC / TOP STORIES / WBGNavitas Launches into High-Power Markets with GeneSiC SiCPAK™ Modules and Accelerates Bare-Die Sales
May 8, 2023
2 Min ReadNavitas Semiconductor, the only pure-play, next-generation power semiconductor company, announced their expanded portfolio into higher power markets with their leading-edge silicon carbide (SiC) power products in SiCPAK™ modules and bare die.
Target applications cover centralized and string solar inverters, energy storage systems (ESS), industrial motion, electric vehicle (EV) on-board chargers, EV roadside fast chargers, wind energy, UPS, bi-directional microgrids, DC-DC converters, and solid-state circuit breakers.
Ranging from 650 V to 6,500 V, Navitas has the widest range of SiC technology. From an original line-up of discrete packages – from 8×8 mm surface-mount QFNs to through-hole TO-247s – the GeneSiC SiCPAK is an initial, direct entry point into higher-power applications. A comprehensive power-module roadmap, with high-voltage SiC MOSFETs and MPS diodes, GaN power ICs, high-speed digital isolators and low-voltage silicon control ICs is being mapped out.
Dr. Ranbir Singh, Navitas EVP for SiC noted, “With a complete portfolio of leading-edge power, control and isolation technology, Navitas will enable customers to accelerate the transition from fossil fuels, and legacy silicon power products to new, renewable energy sources and next-generation semiconductors, with more powerful, more efficient, faster-charging systems.”
SiCPAK™ modules employ ‘press-fit’ technology to offer compact form factors for power circuits and deliver cost-effective, power-dense solutions to end users. The modules are built upon GeneSiC die that have already made a mark in terms of superior performance, reliability, and ruggedness. Examples include a SiCPAK half-bridge module, rated at 6 mOhm, 1,200 V with industry-leading trench-assisted planar-gate SiC MOSFET technology. Multiple configurations of SiC MOSFETs and MPS diodes will be available to create application-specific modules for superior system performance. The initial release will include 1,200 V-rated half-bridge modules in 6, 12, 20, and 30mOhm ratings.
Within the lead-free SiCPAK, each SiC chip is silver (Ag) sintered to the module’s substrate for superior cooling and reliability. The substrate itself is ‘direct-bonded copper’ (DBC) and manufactured using an active-metal brazing (AMB) technique on silicon-nitride (Si3N4) ceramics, ideal for power-cycling applications. This construction delivers excellent strength and flexibility, fracture resistance, and good thermal conductivity for cool, reliable, long-life operation.
For customers who prefer to make their own high-power modules, all GeneSiC MOSFET and MPS diodes are available in bare die format, with gold (Au) and aluminum (Al) top-side metalizations.
Original – Navitas Semiconductor
