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Toshiba Electronic Devices & Storage Corporation has developed a new trench-gate silicon carbide (SiC) MOSFET technology that simultaneously reduces on-resistance and improves short-circuit robustness, addressing one of the key trade-offs in high-performance SiC power devices.
The innovation centers on optimizing the bottom p-well structure beneath the trench gate and refining the design of the junction field-effect transistor (JFET) region, including its width and doping concentration. By narrowing the JFET width and increasing doping levels, Toshiba demonstrated suppression of short-circuit current and reduced short-circuit energy generation inside the device.
The company confirmed that this approach lowers internal temperature rise during fault events while maintaining gate oxide reliability, a critical requirement for long-term SiC device durability. Prototype devices achieved approximately 25% lower on-resistance compared with conventional trench-gate SiC MOSFETs while preserving short-circuit robustness.
This development is particularly important because trench-gate SiC MOSFETs are widely favored for their low conduction losses and high current density, but balancing efficiency with short-circuit survivability has remained a major design challenge. Toshiba’s findings establish a new design methodology focused on minimizing short-circuit energy as a path toward improved reliability and efficiency.
The technology targets demanding high-efficiency power conversion applications including electric vehicles, renewable energy systems, industrial power supplies, and AI data center infrastructure, where both efficiency and fault tolerance are critical.
Commercialization is already underway, with test samples of the 1200 V trench-gate SiC MOSFET “TW007D120E” shipping earlier this month. Toshiba will present additional technical details at ISPSD 2026 in Las Vegas.
Original – Toshiba
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USI has unveiled a new advanced power semiconductor packaging technology platform that embeds silicon carbide (SiC) dies into multilayer ABF substrates while integrating ceramic insulation and wire-bondless architectures into industry-standard power module packages.
The new technology combines SiC chip embedding with Single-Side Copper Exposed (SSC) packaging to deliver lower stray inductance, reduced conduction resistance, and improved thermal performance. By integrating ceramic substrate insulation directly into the package structure, USI eliminates the need for additional isolation components while maintaining electrical reliability and compact form factors.
A key innovation is the adoption of a wire-bondless architecture, which improves current handling and thermal dissipation while enabling larger die integration within slimmer package footprints. Compared with traditional wire-bonded module designs, the approach reduces conduction losses, lowers heat generation, and enhances long-term reliability — all critical requirements for high-power-density applications such as AI data centers, electric vehicles, and humanoid robotics.
USI is positioning itself beyond traditional EMS manufacturing by expanding into higher-value power module integration and advanced packaging services. The company also emphasized its broader automotive powertrain capabilities, including 400 V/800 V inverter systems, intelligent battery disconnect units (iBDUs), and integrated OBC/DC-DC solutions.
The technology aligns with broader industry trends toward highly integrated, thermally optimized power systems for electrification and AI infrastructure. USI plans to showcase the new packaging platform and related power solutions at PCIM Europe 2026.
Original – USI
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Polar Semiconductor and Nexperia have announced a strategic collaboration to manufacture next-generation power MOSFET devices at Polar Semiconductor’s U.S.-based wafer fabrication facility.
The partnership combines Polar’s domestic manufacturing capabilities and power semiconductor process expertise with Nexperia’s advanced MOSFET technology portfolio. The collaboration is aimed at supporting growing global demand across AI server infrastructure, robotics, industrial automation, and automotive applications.
Under the agreement, Nexperia is developing a broad roadmap of next-generation power MOSFETs covering multiple voltage classes and package technologies, while Polar provides high-volume manufacturing capacity from its Minnesota-based facility. Polar brings more than 25 years of automotive manufacturing experience and operates under IATF 16949 certification with a focus on zero-defect manufacturing.
Original – Nexperia
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Magnachip Semiconductor Corporation announced that it will present its medium-voltage (MV) MOSFET portfolio for AI servers and data center power systems at PCIM Europe 2026 in Nuremberg, Germany.
The company will highlight MOSFET solutions designed for server power supply units (PSUs), high-performance computing (HPC), industrial power systems, and solar inverters. These products target the growing need for higher power efficiency, increased power density, and improved thermal management in AI-driven infrastructure.
Magnachip’s MV MOSFET family is based on advanced Shielded-Gate Trench (SGT) technology, supporting improved current density and switching performance while enabling compact, high-temperature power designs. The devices are intended for critical power conversion stages such as synchronous rectification in AI server and HPC power architectures.
In addition to MV MOSFETs, Magnachip will showcase its broader power semiconductor portfolio, including low-voltage MOSFETs, super-junction MOSFETs, IGBTs, silicon carbide devices, and power ICs supporting applications across automotive, industrial automation, energy storage, and renewable energy systems.
Original – Magnachip Semiconductor
