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Wolfspeed, Inc. announced successful production of a single-crystal 300 mm (12-inch) silicon carbide wafer. Backed by one of the industry’s largest silicon carbide IP portfolios—more than 2,300 issued and pending patents worldwide—the company is pioneering the transition to 300 mm and setting a path toward future volume commercialization.
The advance represents a meaningful step for next-generation computing platforms, immersive AR/VR systems, and high-efficiency power devices. By extending silicon carbide to 300 mm, Wolfspeed is opening new performance thresholds and manufacturing scalability for demanding semiconductor applications.
“Producing a 300 mm single crystal silicon carbide wafer is a significant technology achievement and the result of years of focused innovation in crystal growth, boule and wafer processing,” said Elif Balkas, Chief Technology Officer at Wolfspeed. “It positions Wolfspeed to support the industry’s most transformative technologies, especially critical elements of the AI ecosystem, immersive augmented and virtual reality systems, and other advanced power device applications.”
Wolfspeed’s 300 mm platform is designed to unify high-volume silicon carbide manufacturing for power electronics with advanced capabilities in high-purity semi-insulating substrates used in optical and RF systems. This convergence enables a new class of wafer-scale integration across optical, photonic, thermal, and power domains.
As AI workloads drive data centers toward their power limits, the 300 mm silicon carbide platform will help integrate high-voltage power delivery, advanced thermal solutions, and active interconnects at wafer scale—pushing system performance beyond conventional transistor scaling. In AR/VR, silicon carbide’s material properties—including mechanical strength, thermal conductivity, and optical refractive control—support compact, lightweight architectures that pair high-brightness displays with effective thermal management.
Beyond AI and AR/VR, moving silicon carbide to 300 mm enhances the ability to scale production of advanced power devices for applications such as high-voltage grid transmission and next-generation industrial systems, improving economics and long-term supply assurance.
“This 300 mm breakthrough is more than a technical milestone—it unlocks new opportunities for silicon carbide as a strategic material,” said Poshun Chiu, Principal Analyst, Compound Semiconductor, Yole Group. “It clearly demonstrates that silicon carbide is advancing to the next level of manufacturing maturity required for the coming decade of electrification, digitalization, and AI, and provides the market with a credible roadmap toward higher-volume production, improved economics and long-term supply assurance.”
Original – Wolfspeed
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Soitec announced that its Board of Directors has appointed Laurent Rémont as Chief Executive Officer, effective April 1, 2026.
Rémont, 54, currently serves as Senior Vice President at Infineon Technologies, where he led the Radio Frequency and Sensors business. He previously was Chief Technology Officer at Kontron AG and spent more than fifteen years at STMicroelectronics in general management and R&D roles. His international background spans markets central to Soitec’s strategy—including mobile communications, automotive and artificial intelligence—and brings extensive experience managing complex technological and industrial operations.
The Board underscored its intent to build on the Group’s recent progress, enhancing the value of Soitec’s diversified product and technology portfolio—particularly around AI—and seizing opportunities across the semiconductor market. “We are convinced that Laurent Rémont has all the right attributes to lead Soitec into the next stage of its development,” said Frédéric Lissalde, Chairman of Soitec’s Board of Directors. “His knowledge of the semiconductor industry and value chains, upstream and downstream, is a great match for the profile the Board was seeking to oversee implementation of the Group’s strategic priorities. We were particularly impressed by his innovative mindset, his strategic vision and his proven ability to design and deploy transformative roadmaps. I would like to thank Pierre Barnabé for his ongoing commitment during a particularly demanding period for Soitec.”
“I am proud to join Soitec and grateful for the trust placed in me,” said Laurent Rémont. “Our industry is undergoing rapid change, driven by innovation and the emergence of new technologies that are profoundly transforming how we use technology. Soitec plays a key role at the heart of these transformations, and I look forward to working alongside the management team and all employees to build the next phase of the Group’s development.”
Rémont will join Soitec on March 16, 2026, as a special advisor to CEO Pierre Barnabé before succeeding him at the beginning of the following month. Pierre Barnabé, who announced his resignation on October 1, 2025, will step down on March 31, 2026.
The appointment follows a rigorous selection process led by the Board of Directors and recommended by the Board’s Compensation, Nominations and Board Governance Committee. Rémont’s appointment as a director remains subject to shareholder approval at Soitec’s Annual General Meeting in July 2026; subject to that approval, his three-year term as director will commence on that date.
Original – Soitec
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Aehr Test Systems reported results for its fiscal second quarter ended November 28, 2025, and reinstated guidance for the second half of fiscal 2026.
Fiscal second quarter highlights:
- Net revenue: $9.9 million (vs. $13.5 million in Q2 FY2025)
- GAAP net loss: $(3.2) million, or $(0.11) per diluted share (vs. $(1.0) million, or $(0.03) per diluted share)
- Non-GAAP net loss: $(1.3) million, or $(0.04) per diluted share (vs. non-GAAP net income of $0.7 million, or $0.02 per diluted share)
- Bookings: $6.2 million
- Backlog: $11.8 million as of November 28, 2025; effective backlog $18.3 million including post-quarter bookings
- Total cash, cash equivalents and restricted cash: $31.0 million (vs. $24.7 million at August 29, 2025)
Fiscal first six months:
- Net revenue: $20.9 million (vs. $26.6 million in the first half of FY2025)
- GAAP net loss: $(5.3) million, or $(0.18) per diluted share (vs. $(0.4) million, or $(0.01) per diluted share)
- Non-GAAP net loss: $(1.0) million, or $(0.04) per diluted share (vs. non-GAAP net income of $2.8 million, or $0.10 per diluted share)
- Cash used in operating activities: $1.5 million
CEO Gayn Erickson noted softer-than-anticipated Q2 revenue but highlighted progress across wafer-level burn-in (WLBI) and packaged-part burn-in (PPBI). Based on recent customer forecasts, the company expects second-half bookings between $60 million and $80 million, positioning Aehr for a strong fiscal 2027 beginning May 30, 2026.Operational updates:
- WLBI momentum: Production installations expanded across multiple end markets. A lead AI processor customer requested additional capacity this fiscal year and plans to add systems and transition to Aehr’s fully integrated automatic WaferPak™ aligner for 300 mm wafers.
- New WLBI hardware: Initial high-power fine-pitch WaferPak for AI processors entered testing under a benchmark program with a top-tier AI supplier using FOX-XP™ systems. Two additional AI companies requested WLBI benchmark evaluations.
- Services partnership: Aehr announced a strategic partnership with ISE Labs to deliver advanced wafer-level test and burn-in services for next-generation HPC and AI applications.
- PPBI traction: Growing packaged-part qualification and production burn-in for AI is driving orders for the Sonoma™ ultra-high-power PPBI platform. Fiscal Q3-to-date orders exceed $5.5 million, including initial orders for the next-generation fully automated Sonoma platform from a premier Silicon Valley lab.
- Pipeline and forecasts: New Sonoma wins for HTOL qualification are expected to drive additional capacity at test houses, with at least one customer planning production later this calendar year. The lead PPBI production customer for AI processors forecasts substantial growth in 2026 and beyond, with requested shipments beginning in Q1 fiscal 2027.
- Memory and photonics: WLBI benchmark with a global flash leader demonstrated FOX-XP as a competitive alternative to traditional packaged-part test; proposals extended to High Bandwidth Flash (HBF). In silicon photonics, a lead customer has firmed up a production ramp early in next fiscal year; another large customer finalized a forecast for data center devices with a roadmap to optical I/O.
For the second half of fiscal 2026 (November 29, 2025–May 29, 2026), Aehr expects revenue of $25 million to $30 million and non-GAAP net loss per diluted share between $(0.09) and $(0.05). The company reiterated that diversification beyond silicon carbide for EVs—into AI processors, GaN power, data storage, silicon photonics and flash memory—expands its addressable market and supports long-term growth and profitability.Original – Aehr Test Systems
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Cambridge GaN Devices appointed Fabio Necco as Chief Executive Officer. The move is intended to accelerate CGD’s expansion into priority markets.
Necco succeeds CGD Co-founder Giorgia Longobardi, who transitions to Chief Marketing Officer while remaining a Director on CGD’s Board and serving on the Advisory Board of the International Semiconductor Industry Group (I.S.I.G.). “I am delighted to welcome Fabio to CGD and hand over the day-to-day leadership of the company while I channel my energy into my passion for bringing advanced, sustainable and energy-efficient power electronics solutions to market,” said Longobardi. “Fabio is the right person with the right skill set to take CGD into its next growth phase.”
Necco joins CGD from onsemi, where he served as vice president and division general manager. He brings more than 25 years of experience across power electronics, applications engineering, vehicle electrification and data centers—areas central to CGD’s strategy. “CGD is at an exciting juncture,” said Necco. “I’m impressed with the company’s progress and am eager to lead the team into the next stages of product development while substantially increasing our presence in key markets.”
CGD develops GaN devices that enable designers to build sustainable, high-efficiency power systems. Its ICeGaN® technology uses a monolithic, single-chip architecture that integrates all necessary components on one die, improving efficiency and performance while simplifying design. The portfolio emphasizes compact, engineer-led devices suited to market-specific requirements such as traction/auxiliary inverters for electric vehicles and industrial power conversion. A focus on bare die, ease of use, robust gate design and parallel operation supports a broad range of power applications.
Original – Cambridge GaN Devices
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Micro Commercial Components (MCC) introduced a new automotive-qualified Schottky Barrier Rectifier (SBR) series that adds high-performance options in compact DPAK and D2PAK packages. Engineered for demanding vehicle power architectures, the devices combine low forward voltage, high current capability and stable high-temperature operation to help designers boost efficiency and reliability in automotive power systems.
The series spans 10 A to 60 A with voltage ratings from 45 V to 100 V, enabling broad use across power conversion and protection functions in conventional and electrified platforms. AEC-Q101 qualification, low power loss and a maximum junction temperature of 175 °C support dependable, long-term operation under harsh conditions—reducing thermal stress, improving system efficiency and simplifying design-in for automotive and EV applications.
Features & benefits:
- AEC-Q101 qualified for automotive reliability
- High current capability for demanding power stages
- Low forward voltage to minimize conduction losses
- Maximum junction temperature of 175 °C for high-temperature operation
- Compact DPAK package (approx. 6.5 mm × 6.1 mm)
- High-thermal-performance D2PAK package (approx. 10.4 mm × 9.2 mm)
Original – Micro Commercial Components
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Allegro MicroSystems, Inc. announced a strategic expansion of its Power-Thru™ isolated gate driver family with the AHV85003/AHV85043 chipset. Alongside the flagship AHV85311 integrated solution, the broader portfolio forms a complete ecosystem for high-voltage SiC designs in AI data centers, electric vehicles and clean-energy systems. By eliminating external isolated bias supplies for gate drivers, the solution shrinks footprint and BOM—critical for maximizing power density in demanding 800 V platforms.
Power-Thru isolated gate drivers integrate signal and power across a single isolation barrier, reducing common-mode capacitance by up to 15x to mitigate a major noise source. The approach can deliver up to a 20 dB improvement in EMI performance, boosting efficiency and saving engineering time otherwise spent on noise debugging. To reinforce supply chain resilience, both the new AHV85003/AHV85043 chipset and the AHV85311 integrated device support a multi-source SiC strategy. With selectable Vgs options of 15 V, 18 V and 20 V and an adjustable regulated negative voltage, designers can transition among SiC FET vendors without a board redesign.
The expanded portfolio offers two implementation paths. The AHV85311 integrates the isolation transformer for a plug-and-play route that accelerates time-to-market. The AHV85003/AHV85043 chipset gives teams the flexibility to choose an external transformer to optimize cost, layout and isolation requirements while retaining the same efficiency and noise advantages.
“We are redefining what engineers should expect from a gate driver,” said Vijay Mangtani, Vice President and GM of High Voltage Power Products at Allegro MicroSystems. “With Power-Thru, we solved the fundamental physics problem of noise in high-voltage systems. Now, by offering both a chipset and an integrated solution, we are giving our customers a complete toolkit. Whether they need the plug-and-play speed of an integrated solution or the granular control of a chipset, they get the same game-changing efficiency and the freedom to use the SiC FETs of their choice.”
Original – Allegro MicroSystems
